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MC9S12G Datasheet, PDF (347/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.
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S12 Clock, Reset and Power Management Unit (S12CPMU)
Table 10-10. RTI Frequency Divide Rates for RTDEC = 0
RTR[6:4] =
RTR[3:0]
000
(OFF)
001
(210)
010
(211)
011
(212)
100
(213)
101
(214)
110
(215)
111
(216)
1110 (÷15)
OFF
15x210
15x211
15x212
15x213
15x214
15x215
15x216
1111 (÷16)
OFF
16x210
16x211
16x212
16x213
16x214
16x215
16x216
1 Denotes the default value out of reset.This value should be used to disable the RTI to ensure future backwards compatibility.
RTR[3:0]
0000 (÷1)
0001 (÷2)
0010 (÷3)
0011 (÷4)
0100 (÷5)
0101 (÷6)
0110 (÷7)
0111 (÷8)
1000 (÷9)
1001 (÷10)
1010 (÷11)
1011 (÷12)
1100 (÷13)
1101 (÷14)
1110 (÷15)
1111 (÷16)
Table 10-11. RTI Frequency Divide Rates for RTDEC=1
000
(1x103)
1x103
2x103
3x103
4x103
5x103
6x103
7x103
8x103
9x103
10 x103
11 x103
12x103
13x103
14x103
15x103
16x103
001
(2x103)
2x103
4x103
6x103
8x103
10x103
12x103
14x103
16x103
18x103
20x103
22x103
24x103
26x103
28x103
30x103
32x103
010
(5x103)
5x103
10x103
15x103
20x103
25x103
30x103
35x103
40x103
45x103
50x103
55x103
60x103
65x103
70x103
75x103
80x103
RTR[6:4] =
011
(10x103)
10x103
20x103
30x103
40x103
50x103
60x103
70x103
80x103
90x103
100x103
110x103
120x103
130x103
140x103
150x103
160x103
100
(20x103)
20x103
40x103
60x103
80x103
100x103
120x103
140x103
160x103
180x103
200x103
220x103
240x103
260x103
280x103
300x103
320x103
101
(50x103)
50x103
100x103
150x103
200x103
250x103
300x103
350x103
400x103
450x103
500x103
550x103
600x103
650x103
700x103
750x103
800x103
110
(100x103)
100x103
200x103
300x103
400x103
500x103
600x103
700x103
800x103
900x103
1x106
1.1x106
1.2x106
1.3x106
1.4x106
1.5x106
1.6x106
111
(200x103)
200x103
400x103
600x103
800x103
1x106
1.2x106
1.4x106
1.6x106
1.8x106
2x106
2.2x106
2.4x106
2.6x106
2.8x106
3x106
3.2x106
10.3.2.9 S12CPMU COP Control Register (CPMUCOP)
This register controls the COP (Computer Operating Properly) watchdog.
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
347
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
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