MC9S12G Datasheet, PDF (152/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Port Integration Module (S12GPIMV0)
Global Address
Register Name
0x0259
PTIP
Table 2-19. Block Register Map (G1) (continued)
Bit 7
R PTIP7
W
6
PTIP6
5
PTIP5
4
PTIP4
3
PTIP3
2
PTIP2
0x025A
DDRP
R
DDRP7
W
DDRP6
DDRP5
DDRP4
DDRP3
DDRP2
0x025B
R
0
0
0
0
0
0
Reserved
W
0x025C
PERP
R
PERP7
W
PERP6
PERP5
PERP4
PERP3
PERP2
0x025D
PPSP
R
PPSP7
W
PPSP6
PPSP5
PPSP4
PPSP3
PPSP2
0x025E
PIEP
R
PIEP7
W
PIEP6
PIEP5
PIEP4
PIEP3
PIEP2
0x025F
PIFP
R
PIFP7
W
PIFP6
PIFP5
PIFP4
PIFP3
PIFP2
0x0260–0x0267 R
0
0
0
0
0
0
Reserved
W
0x0268
PTJ
R
PTJ7
W
PTJ6
PTJ5
PTJ4
PTJ3
PTJ2
0x0269
PTIJ
R PTIJ7
W
PTIJ6
PTIJ5
PTIJ4
PTIJ3
PTIJ2
0x026A
DDRJ
R
DDRJ7
W
DDRJ6
DDRJ5
DDRJ4
DDRJ3
DDRJ2
0x026B
R
0
0
0
0
0
0
Reserved
W
0x026C
PERJ
R
PERJ7
W
PERJ6
PERJ5
PERJ4
PERJ3
PERJ2
0x026D
PPSJ
R
PPSJ7
W
PPSJ6
PPSJ5
PPSJ4
PPSJ3
PPSJ2
0x026E
PIEJ
R
PIEJ7
W
PIEJ6
PIEJ5
PIEJ4
PIEJ3
PIEJ2
= Unimplemented or Reserved
1
PTIP1
DDRP1
0
PERP1
PPSP1
PIEP1
PIFP1
0
PTJ1
PTIJ1
DDRJ1
0
PERJ1
PPSJ1
PIEJ1
Bit 0
PTIP0
DDRP0
0
PERP0
PPSP0
PIEP0
PIFP0
0
PTJ0
PTIJ0
DDRJ0
0
PERJ0
PPSJ0
PIEJ0
MC9S12G Family Reference Manual, Rev.1.01
152
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.