MC9S12G Datasheet, PDF (1036/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

240 KByte Flash Module (S12FTMRG240K2V1)
28.3.2.9 P-Flash Protection Register (FPROT)
The FPROT register defines which P-Flash sectors are protected against program and erase operations.
Offset Module Base + 0x0008
R
W
Reset
7
FPOPEN
F¹
6
RNV6
F¹
5
FPHDIS
F¹
4
3
FPHS[1:0]
F¹
F¹
2
FPLDIS
F¹
= Unimplemented or Reserved
Figure 28-13. Flash Protection Register (FPROT)
1 _{Loaded from IFR Flash configuration field, during reset sequence.}
1
0
FPLS[1:0]
F¹
F¹
The (unreserved) bits of the FPROT register are writable with the restriction that the size of the protected
region can only be increased (see Section 28.3.2.9.1, “P-Flash Protection Restrictions,” and Table 28-21).
During the reset sequence, the FPROT register is loaded with the contents of the P-Flash protection byte
in the Flash configuration field at global address 0x3_FF0C located in P-Flash memory (see Table 28-4)
as indicated by reset condition ‘F’ in Figure 28-13. To change the P-Flash protection that will be loaded
during the reset sequence, the upper sector of the P-Flash memory must be unprotected, then the P-Flash
protection byte must be reprogrammed. If a double bit fault is detected while reading the P-Flash phrase
containing the P-Flash protection byte during the reset sequence, the FPOPEN bit will be cleared and
remaining bits in the FPROT register will be set to leave the P-Flash memory fully protected.
Trying to alter data in any protected area in the P-Flash memory will result in a protection violation error
and the FPVIOL bit will be set in the FSTAT register. The block erase of a P-Flash block is not possible if
any of the P-Flash sectors contained in the same P-Flash block are protected.
Table 28-17. FPROT Field Descriptions
Field
Description
7
FPOPEN
Flash Protection Operation Enable — The FPOPEN bit determines the protection function for program or
erase operations as shown in Table 28-18 for the P-Flash block.
0 When FPOPEN is clear, the FPHDIS and FPLDIS bits define unprotected address ranges as specified by the
corresponding FPHS and FPLS bits
1 When FPOPEN is set, the FPHDIS and FPLDIS bits enable protection for the address range specified by the
corresponding FPHS and FPLS bits
6
Reserved Nonvolatile Bit — The RNV bit should remain in the erased state for future enhancements.
RNV[6]
5
FPHDIS
Flash Protection Higher Address Range Disable — The FPHDIS bit determines whether there is a
protected/unprotected area in a specific region of the P-Flash memory ending with global address 0x3_FFFF.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
4–3
Flash Protection Higher Address Size — The FPHS bits determine the size of the protected/unprotected area
FPHS[1:0] in P-Flash memory as shown inTable 28-19. The FPHS bits can only be written to while the FPHDIS bit is set.
MC9S12G Family Reference Manual, Rev.1.01
1036
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.