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| MC9S12G Datasheet, PDF (475/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops. | |||
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Digital Analog Converter (DAC_8B5V)
Operational ampliï¬er 001
Unbuffered DAC
100
Unbuffered DAC with 101
Operational ampliï¬er
Buffered DAC
111
Table 15-5. DAC Modes of Operation
disabled
enabled
enabled
enabled
enabled
disabled
enabled
enabled
disabled
unbuffered resistor
output voltage
unbuffered resistor
output voltage
disconnected
depend on AMPP
and AMPM input
disconnected
depend on AMPP
and AMPM input
buffered resistor
output voltage
The DAC resistor network itself can work on two different voltage ranges:
Table 15-6. DAC Resistor Network Voltage ranges
DAC Mode
Description
Full Voltage Range (FVR)
Reduced Voltage Range
DAC resistor network provides a output voltage over the complete input voltage range,
default after reset
DAC resistor network provides a output voltage over a reduced input voltage range
Table 15-7 shows the control signal decoding for each mode. For more detailed mode description see the
sections below.
Table 15-7. DAC Control Signals
DACM
Off
000
Operational ampliï¬er 001
Unbuffered DAC
100
Unbuffered DAC with 101
Operational ampliï¬er
Buffered DAC
111
DAC resistor
network
disabled
disabled
enabled
enabled
Operational
Ampliï¬er
disabled
enabled
disabled
enabled
enabled
enabled
Switch S1
open
closed
open
closed
open
Switch S2
open
open
open
open
closed
Switch S3
open
open
closed
closed
open
15.5.2 Mode âOffâ
The âOffâ mode is the default mode after reset and is selected by DACCTL.DACM[2:0] = 0x0. During this
mode the DAC resistor network and the operational ampliï¬er are disabled and all switches are open. This
mode provides the lowest power consumption. For decoding of the control signals see Table 15-7.
15.5.3 Mode âOperational Ampliï¬erâ
The âOperational Ampliï¬erâ mode is selected by DACCTL.DACM[2:0] = 0x1. During this mode the
operational ampliï¬er can be used independent from the DAC resister network. All required ampliï¬er
signals, AMP, AMPP and AMPM are available on the pins. The DAC resistor network output is
disconnected from the DACU pin. The connection between the ampliï¬er output and the negative ampliï¬er
input is open. For decoding of the control signals see Table 15-7.
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
475
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
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