MC9S12G Datasheet, PDF (681/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

16 KByte Flash Module (S12FTMRG16K1V1)
21.3.2.16 Flash Option Register (FOPT)
The FOPT register is the Flash option register.
Offset Module Base + 0x0010
7
6
5
4
3
2
1
0
R
NV[7:0]
W
Reset
F¹
F¹
F¹
F¹
F¹
F¹
F¹
F¹
= Unimplemented or Reserved
Figure 21-21. Flash Option Register (FOPT)
1 _{Loaded from IFR Flash configuration field, during reset sequence.}
All bits in the FOPT register are readable but are not writable.
During the reset sequence, the FOPT register is loaded from the Flash nonvolatile byte in the Flash
configuration field at global address 0x3_FF0E located in P-Flash memory (see Table 21-4) as indicated
by reset condition F in Figure 21-21. If a double bit fault is detected while reading the P-Flash phrase
containing the Flash nonvolatile byte during the reset sequence, all bits in the FOPT register will be set.
Table 21-23. FOPT Field Descriptions
Field
7–0
NV[7:0]
Description
Nonvolatile Bits — The NV[7:0] bits are available as nonvolatile bits. Refer to the device user guide for proper
use of the NV bits.
21.3.2.17 Flash Reserved5 Register (FRSV5)
This Flash register is reserved for factory testing.
Offset Module Base + 0x0011
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 21-22. Flash Reserved5 Register (FRSV5)
All bits in the FRSV5 register read 0 and are not writable.
21.3.2.18 Flash Reserved6 Register (FRSV6)
This Flash register is reserved for factory testing.
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
681
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.