MC9S12G Datasheet, PDF (259/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Background Debug Module (S12SBDMV1)
Global Register
Address Name
Bit 7
6
5
4
3
2
1
Bit 0
0x3_FF08 BDMPPR R
0
0
0
BPAE
BPP3
BPP2
BPP1
BPP0
W
0x3_FF09 Reserved R
0
0
0
0
0
0
0
0
W
0x3_FF0A Reserved R
0
0
0
0
0
0
0
0
W
0x3_FF0B Reserved R
0
0
0
0
0
0
0
0
W
= Unimplemented, Reserved
= Implemented (do not alter)
X
= Indeterminate
0
= Always read zero
Figure 7-2. BDM Register Summary (continued)
7.3.2.1 BDM Status Register (BDMSTS)
Register Global Address 0x3_FF01
7
R
ENBDM
W
Reset
Special Single-Chip Mode
0¹
All Other Modes
0
6
5
BDMACT
0
4
SDV
1
0
0
0
0
0
= Unimplemented, Reserved
3
2
1
0
TRACE
0
UNSEC
0
0
0
0²
0
0
0
0
0
= Implemented (do not alter)
0
= Always read zero
1 _{ENBDM is read as 1 by a debugging environment in special single chip mode when the device is not secured or secured but}
fully erased (Flash). This is because the ENBDM bit is set by the standard BDM firmware before a BDM command can be fully
transmitted and executed.
2 _{UNSEC is read as 1 by a debugging environment in special single chip mode when the device is secured and fully erased,}
else it is 0 and can only be read if not secure (see also bit description).
Figure 7-3. BDM Status Register (BDMSTS)
Read: All modes through BDM operation when not secured
Write: All modes through BDM operation when not secured, but subject to the following:
— ENBDM should only be set via a BDM hardware command if the BDM firmware commands
are needed. (This does not apply in special single chip mode).
— BDMACT can only be set by BDM hardware upon entry into BDM. It can only be cleared by
the standard BDM firmware lookup table upon exit from BDM active mode.
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
259
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.