MC9S12G Datasheet, PDF (601/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Serial Communication Interface (S12SCIV5)
18.5.3.1.8 BKDIF Description
The BKDIF interrupt is set when a break signal was received. Clear BKDIF by writing a “1” to the
SCIASR1 SCI alternative status register 1. This flag is also cleared if break detect feature is disabled.
18.5.4 Recovery from Wait Mode
The SCI interrupt request can be used to bring the CPU out of wait mode.
18.5.5 Recovery from Stop Mode
An active edge on the receive input can be used to bring the CPU out of stop mode.
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
601
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.