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MC9S12G Datasheet, PDF (381/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.
1If only AN0 should be converted use MULT=0.
Analog-to-Digital Converter (ADC10B8CV2)
11.3.2.2 ATD Control Register 1 (ATDCTL1)
Writes to this register will abort current conversion sequence.
Module Base + 0x0001
7
R
ETRIGSEL
W
Reset
0
6
SRES1
5
SRES0
4
3
2
1
0
SMP_DIS ETRIGCH3 ETRIGCH2 ETRIGCH1 ETRIGCH0
0
1
0
1
1
1
1
Figure 11-4. ATD Control Register 1 (ATDCTL1)
Read: Anytime
Write: Anytime
Table 11-3. ATDCTL1 Field Descriptions
Field
Description
7
ETRIGSEL
External Trigger Source Select — This bit selects the external trigger source to be either one of the AD
channels or one of the ETRIG3-0 inputs. See device specification for availability and connectivity of ETRIG3-0
inputs. If a particular ETRIG3-0 input option is not available, writing a 1 to ETRISEL only sets the bit but has
no effect, this means that one of the AD channels (selected by ETRIGCH3-0) is configured as the source for
external trigger. The coding is summarized in Table 11-5.
6–5
A/D Resolution Select — These bits select the resolution of A/D conversion results. See Table 11-4 for
SRES[1:0] coding.
4
SMP_DIS
Discharge Before Sampling Bit
0 No discharge before sampling.
1 The internal sample capacitor is discharged before sampling the channel. This adds 2 ATD clock cycles to
the sampling time. This can help to detect an open circuit instead of measuring the previous sampled
channel.
3–0
External Trigger Channel Select — These bits select one of the AD channels or one of the ETRIG3-0 inputs
ETRIGCH[3:0] as source for the external trigger. The coding is summarized in Table 11-5.
Table 11-4. A/D Resolution Coding
SRES1
SRES0
A/D Resolution
0
0
8-bit data
0
1
10-bit data
1
0
1
1
Reserved
Table 11-5. External Trigger Channel Select Coding
ETRIGSEL
0
0
ETRIGCH3
0
0
ETRIGCH2
0
0
ETRIGCH1
0
0
ETRIGCH0
0
1
External trigger source is
AN0
AN1
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
381
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.