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MC9S12G Datasheet, PDF (167/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.
Port Integration Module (S12GPIMV0)
Table 2-25. DDRB Register Field Descriptions
Field
7-0
DDRB
Description
Port B Data Direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin configured as output
0 Associated pin configured as input
2.4.3.5 Port C Data Register (PORTC)
Address 0x0004 (G1)
7
R
PC7
W
6
PC6
Reset
0
0
Address 0x0004 (G2, G3)
5
PC5
0
4
PC4
0
3
PC3
0
2
PC2
0
7
6
5
4
3
2
R
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
Figure 2-6. Port C Data Register (PORTC)
1 Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
Access: User read/write1
1
0
PC1
PC0
0
0
Access: User read only
1
0
0
0
0
0
Field
7-0
PC
Table 2-26. PORTC Register Field Descriptions
Description
Port C general-purpose input/output data—Data Register
The associated pin can be used as general-purpose I/O. In general-purpose output mode the port data register bit
value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port data register bit, otherwise the
buffered pin input state is read.
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
167
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.