MC9S12G Datasheet, PDF (133/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Port Integration Module (S12GPIMV0)
• When routing of ADC channels to PC4-PC0 is selected
(PRR1[PRR1AN]=1) the related bit in the ADC Digital Input Enable
Register (ATDDIEN) must be set to 1 to activate the digital input
function on those pins not used as ADC inputs.
PC7
PC6
PC5
PC4-PC2
PC1-PC0
Table 2-8. Port C Pins PC7-0
• 100 LQFP: The unbuffered analog output signal DACU1 of the DAC1 module is mapped to this pin if
the DAC is operating in “unbuffered DAC” mode. If this pin is used with the DAC then the digital I/O
function and pull device are disabled.
• Signal priority:
100 LQFP: DACU1 > GPO
• 100 LQFP: The non-inverting analog input signal AMPP1 of the DAC1 module is mapped to this pin if
the DAC is operating in “unbuffered DAC with operational amplifier” or “operational amplifier only”
mode. If this pin is used with the DAC then the digital input buffer is disabled.
• Signal priority:
100 LQFP: GPO
• 100 LQFP: The inverting analog input signal AMPM1 of the DAC1 module is mapped to this pin if the
DAC is operating in “unbuffered DAC with operational amplifier” or “operational amplifier only” mode.
If this pin is used with the DAC then the digital input buffer is disabled.
• Signal priority:
100 LQFP: GPO
• 100 LQFP: If routing is active (PRR1[PRR1AN]=1) the ADC analog input channel signals AN15-13 and
their related digital trigger inputs are mapped to these pins. The routed ADC function has no effect on
the output state. The input buffers are controlled by the related ATDDIEN bits and the ADC trigger
functions.
• Signal priority:
100 LQFP: GPO
• 100 LQFP: If routing is active (PRR1[PRR1AN]=1) the ADC analog input channel signals AN11-10 and
their related digital trigger inputs are mapped to these pins. The routed ADC function has no effect on
the output state. The input buffers are controlled by the related ATDDIEN bits and the ADC trigger
functions.
• Signal priority:
100 LQFP: GPO
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
133
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.