MC9S12G Datasheet, PDF (205/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Port Integration Module (S12GPIMV0)
2.4.3.60 Port AD Polarity Select Register (PPS1AD)
Address 0x027B
7
R
PPS1AD7
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
PPS1AD6 PPS1AD5 PPS1AD4 PPS1AD3 PPS1AD2
0
0
0
0
0
Figure 2-59. Port AD Polarity Select Register (PPS1AD)
Access: User read/write¹
1
0
PPS1AD1 PPS1AD0
0
0
Table 2-87. PPS1AD Register Field Descriptions
Field
Description
7-0 Port AD pull device select—Configure pull device and pin interrupt edge polarity on input pin
PPS1AD This bit selects a pullup or a pulldown device if enabled on the associated port input pin.
This bit also selects the polarity of the active pin interrupt edge.
1 Pulldown device selected; rising edge selected
0 Pullup device selected; falling edge selected
2.4.3.61 Port AD Interrupt Enable Register (PIE0AD)
Read: Anytime
Address 0x027C (G1, G2)
7
R
PIE0AD7
W
Reset
0
Address 0x027C (G3)
6
PIE0AD6
0
5
PIE0AD5
0
4
PIE0AD4
0
3
PIE0AD3
0
2
PIE0AD2
0
7
R
0
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
0
0
0
PIE0AD3 PIE0AD2
0
0
0
0
0
Figure 2-60. Port AD Interrupt Enable Register (PIE0AD)
Access: User read/write¹
1
0
PIE0AD1 PIE0AD0
0
0
Access: User read/write¹
1
0
PIE0AD1 PIE0AD0
0
0
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
205
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.