MC9S12G Datasheet, PDF (43/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Device Overview MC9S12G-Family
Table 1-6. Port Availability by Package Option
Port
Port E pins
Port J
Port M
Port P
Port S
Port T
Sum of Ports
I/O Power Pairs VDDX/VSSX
20 TSSOP
2
0
0
0
4
2
14
1/1
32 LQFP
2
0
2
4
6
4
26
1/1
48 LQFP
48 QFN
2
4
2
6
8
6
40
1/1
64 LQFP
2
8
4
8
8
8
54
1/1
100 LQFP
2
8
4
8
8
8
86
3/3
NOTE
To avoid current drawn from floating inputs, the input buffers of all
non-bonded pins are disabled.
1.7.2 Detailed Signal Descriptions
This section describes the signal properties. The relation between signals and package pins is described in
section 1.8 Device Pinouts.
1.7.2.1 RESET — External Reset Signal
The RESET signal is an active low bidirectional control signal. It acts as an input to initialize the MCU to
a known start-up state, and an output when an internal MCU function causes a reset. The RESET pin has
an internal pull-up device.
1.7.2.2 TEST — Test Pin
This input only pin is reserved for factory test. This pin has an internal pull-down device.
NOTE
The TEST pin must be tied to ground in all applications.
1.7.2.3 BKGD / MODC — Background Debug and Mode Pin
The BKGD/MODC pin is used as a pseudo-open-drain pin for the background debug communication. It
is used as a MCU operating mode select pin during reset. The state of this pin is latched to the MODC bit
at the rising edge of RESET. The BKGD pin has an internal pull-up device.
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
43
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.