MC9S12G Datasheet, PDF (180/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Port Integration Module (S12GPIMV0)
Table 2-42. DDRS Register Field Descriptions
Field
7-0
DDRS
Description
Port S data direction—
This bit determines whether the associated pin is a general-purpose input or output.
1 Associated pin configured as output
0 Associated pin configured as input
2.4.3.23 Port S Pull Device Enable Register (PERS)
Address 0x024C
R
W
Reset
7
PERS7
1
1 _{Read: Anytime}
Write: Anytime
6
PERS6
5
PERS5
4
PERS4
3
PERS3
2
PERS2
1
1
1
1
1
Figure 2-24. Port S Pull Device Enable Register (PERS)
Access: User read/write¹
1
0
PERS1
PERS0
1
1
Table 2-43. PERS Register Field Descriptions
Field
7-0
PERS
Description
Port S pull device enable—Enable pull device on input pin or wired-or output pin
This bit controls whether a pull device on the associated port input pin is active. The polarity is selected by the related
polarity select register bit. If a pin is used as output this bit has only effect if used in wired-or mode with a pullup
device.
1 Pull device enabled
0 Pull device disabled
2.4.3.24 Port S Polarity Select Register (PPSS)
Address 0x024D
R
W
Reset
7
PPSS7
0
1 _{Read: Anytime}
Write: Anytime
6
PPSS6
5
PPSS5
4
PPSS4
3
PPSS3
2
PPSS2
0
0
0
0
0
Figure 2-25. Port S Polarity Select Register (PPSS)
Access: User read/write¹
1
0
PPSS1
PPSS0
0
0
MC9S12G Family Reference Manual, Rev.1.01
180
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.