MC9S12G Datasheet, PDF (158/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Port Integration Module (S12GPIMV0)
Global Address
Register Name
0x026F
PIFJ
Table 2-20. Block Register Map (G2) (continued)
Bit 7
R
PIFJ7
W
6
PIFJ6
5
PIFJ5
4
PIFJ4
3
PIFJ3
2
PIFJ2
1
PIFJ1
Bit 0
PIFJ0
0x0270
PT0AD
R
PT0AD7 PT0AD6 PT0AD5 PT0AD4 PT0AD3 PT0AD2 PT0AD1 PT0AD0
W
0x0271
PT1AD
R
PT1AD7 PT1AD6 PT1AD5 PT1AD4 PT1AD3 PT1AD2 PT1AD1 PT1AD0
W
0x0272
PTI0AD
R PTI0AD7 PTI0AD6 PTI0AD5 PTI0AD4 PTI0AD3 PTI0AD2 PTI0AD1 PTI0AD0
W
0x0273
PTI1AD
R PTI1AD7 PTI1AD6 PTI1AD5 PTI1AD4 PTI1AD3 PTI1AD2 PTI1AD1 PTI1AD0
W
0x0274
DDR0AD
R
DDR0AD7 DDR0AD6 DDR0AD5 DDR0AD4 DDR0AD3 DDR0AD2 DDR0AD1 DDR0AD0
W
0x0275
DDR1AD
R
DDR1AD7 DDR1AD6 DDR1AD5 DDR1AD4 DDR1AD3 DDR1AD2 DDR1AD1 DDR1AD0
W
0x0276
R
0
0
0
0
0
0
0
0
Reserved
W
0x0277
R
0
0
0
0
0
0
0
0
Reserved
W
0x0278
PER0AD
R
PER0AD7 PER0AD6 PER0AD5 PER0AD4 PER0AD3 PER0AD2 PER0AD1 PER0AD0
W
0x0279
PER1AD
R
PER1AD7 PER1AD6 PER1AD5 PER1AD4 PER1AD3 PER1AD2 PER1AD1 PER1AD0
W
0x027A
PPS0AD
R
PPS0AD7 PPS0AD6 PPS0AD5 PPS0AD4 PPS0AD3 PPS0AD2 PPS0AD1 PPS0AD0
W
0x027B
PPS1AD
R
PPS1AD7 PPS1AD6 PPS1AD5 PPS1AD4 PPS1AD3 PPS1AD2 PPS1AD1 PPS1AD0
W
0x027C
PIE0AD
R
PIE0AD7 PIE0AD6 PIE0AD5 PIE0AD4 PIE0AD3 PIE0AD2 PIE0AD1 PIE0AD0
W
0x027D
PIE1AD
R
PIE1AD7 PIE1AD6 PIE1AD5 PIE1AD4 PIE1AD3 PIE1AD2 PIE1AD1 PIE1AD0
W
= Unimplemented or Reserved
MC9S12G Family Reference Manual, Rev.1.01
158
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.