MC9S12G Datasheet, PDF (643/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Timer Module (TIM16B8CV3)
Table 20-9. Compare Result Output Action
OMx
OLx
0
0
0
1
1
0
1
1
Action
No output compare
action on the timer output signal
Toggle OCx output line
Clear OCx output line to zero
Set OCx output line to one
Note: To enable output action using the OM7 and OL7 bits on the timer port,the corresponding bit OC7M7
in the OC7M register must also be cleared. The settings for these bits can be seen inTable 20-10.
Table 20-10. The OC7 and OCx event priority
OC7M7=0
OC7Mx=1
TC7=TCx
TC7>TCx
OC7Mx=0
TC7=TCx
TC7>TCx
IOCx=OC7Dx IOCx=OC7Dx
IOC7=OM7/O +OMx/OLx
L7
IOC7=OM7/O
L7
IOCx=OMx/OLx
IOC7=OM7/OL7
OC7M7=1
OC7Mx=1
TC7=TCx
TC7>TCx
OC7Mx=0
TC7=TCx
TC7>TCx
IOCx=OC7Dx IOCx=OC7Dx
IOC7=OC7D7 +OMx/OLx
IOC7=OC7D7
IOCx=OMx/OLx
IOC7=OC7D7
Note: in Table 20-10, the IOS7 and IOSx should be set to 1
IOSx is the register TIOS bit x,
OC7Mx is the register OC7M bit x,
TCx is timer Input Capture/Output Compare register,
IOCx is channel x,
OMx/OLx is the register TCTL1/TCTL2,
OC7Dx is the register OC7D bit x.
IOCx = OC7Dx+ OMx/OLx, means that both OC7 event and OCx event will change channel x value.
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
643
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.