MC9S12G Datasheet, PDF (1044/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

240 KByte Flash Module (S12FTMRG240K2V1)
Table 28-25. FOPT Field Descriptions
Field
7–0
NV[7:0]
Description
Nonvolatile Bits — The NV[7:0] bits are available as nonvolatile bits. Refer to the device user guide for proper
use of the NV bits.
28.3.2.17 Flash Reserved5 Register (FRSV5)
This Flash register is reserved for factory testing.
Offset Module Base + 0x0011
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 28-23. Flash Reserved5 Register (FRSV5)
All bits in the FRSV5 register read 0 and are not writable.
28.3.2.18 Flash Reserved6 Register (FRSV6)
This Flash register is reserved for factory testing.
Offset Module Base + 0x0012
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 28-24. Flash Reserved6 Register (FRSV6)
All bits in the FRSV6 register read 0 and are not writable.
28.3.2.19 Flash Reserved7 Register (FRSV7)
This Flash register is reserved for factory testing.
MC9S12G Family Reference Manual, Rev.1.01
1044
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.