MC9S12G Datasheet, PDF (157/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Port Integration Module (S12GPIMV0)
Table 2-20. Block Register Map (G2) (continued)
Global Address
Register Name
Bit 7
6
5
4
3
2
0x025B
R
0
0
0
0
0
0
Reserved
W
1
Bit 0
0
0
0x025C
PERP
R
PERP7
W
PERP6
PERP5
PERP4
PERP3
PERP2
PERP1
PERP0
0x025D
PPSP
R
PPSP7
W
PPSP6
PPSP5
PPSP4
PPSP3
PPSP2
PPSP1
PPSP0
0x025E
PIEP
R
PIEP7
W
PIEP6
PIEP5
PIEP4
PIEP3
PIEP2
PIEP1
PIEP0
0x025F
PIFP
R
PIFP7
W
PIFP6
PIFP5
PIFP4
PIFP3
PIFP2
PIFP1
PIFP0
0x0260–0x0261 R
Reserved
W
Reserved for ACMP
0x0262–0x0266 R
0
0
0
0
0
0
0
0
Reserved
W
0x0267
Reserved
R
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
W
0x0268
PTJ
R
PTJ7
W
PTJ6
PTJ5
PTJ4
PTJ3
PTJ2
PTJ1
PTJ0
0x0269
PTIJ
R PTIJ7
W
PTIJ6
PTIJ5
PTIJ4
PTIJ3
PTIJ2
PTIJ1
PTIJ0
0x026A
DDRJ
R
DDRJ7
W
DDRJ6
DDRJ5
DDRJ4
DDRJ3
DDRJ2
DDRJ1
DDRJ0
0x026B
R
0
0
0
0
0
0
0
0
Reserved
W
0x026C
PERJ
R
PERJ7
W
PERJ6
PERJ5
PERJ4
PERJ3
PERJ2
PERJ1
PERJ0
0x026D
PPSJ
R
PPSJ7
W
PPSJ6
PPSJ5
PPSJ4
PPSJ3
PPSJ2
PPSJ1
PPSJ0
0x026E
PIEJ
R
PIEJ7
W
PIEJ6
PIEJ5
PIEJ4
PIEJ3
PIEJ2
PIEJ1
PIEJ0
= Unimplemented or Reserved
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
157
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.