MC9S12G Datasheet, PDF (1119/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Electrical Characteristics
In Table A-33 the timing characteristics for slave mode are listed.
Table A-33. SPI Slave Mode Timing Characteristics
Conditions are 4.5 V < V_DD35 < 5.5 V junction temperature from –40°C to +150°C.
Num C
Characteristic
Symbol
Min
Typ
Max
Unit
1
D SCK Frequency
1
D SCK Period
2
D Enable Lead Time
3
D Enable Trail Time
4
D Clock (SCK) High or Low Time
5
D Data Setup Time (Inputs)
6
D Data Hold Time (Inputs)
7
D
Slave Access Time (time to data
active)
8
D Slave MISO Disable Time
9
D Data Valid after SCK Edge
f_sck
DC
t_sck
4
t_L
4
t_T
4
t_wsck
4
t_su
8
t_hi
8
t_a
—
t_dis
—
t_vsck
—
10
D Data Valid after SS fall
t_vss
—
11
D Data Hold Time (Outputs)
t_ho
20
12
D Rise and Fall Time Inputs
t_rfi
—
13
D Rise and Fall Time Outputs
t_rfo
—
1_{0.5tbus added due to internal synchronization delay}
—
1/4
f_bus
—
∞
t_bus
—
—
t_bus
—
—
t_bus
—
—
t_bus
—
—
ns
—
—
ns
—
20
ns
—
22
ns
—
28 + 0.5 ⋅ t_bus ¹
ns
—
28 + 0.5 ⋅ t_bus ¹
ns
—
—
ns
—
9
ns
—
9
ns
A.15 ADC Conversion Result Reference
The reference voltage V_DDF is measured under the conditions shown in Table A-34. The value stored in
the IFR is the average of 8 consecutive conversions.
Table A-34. Measurement Conditions
Description
Regulator supply voltage
I/O supply voltage
Analog supply voltage
ADC reference voltage
ADC clock
ADC sample time
Bus frequency
Ambient temperature
Code execution
NVM activity
Symbol
V_DDR
V_DDX
V_DDA
V_RH
f_ADCCLK
t_SMP
f_bus
T_A
Value
5
5
5
5
2
4
24
150
from RAM
none
Unit
V
V
V
V
MHz
ADC clock cycles
MHz
°C
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
1119
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.