MC9S12G Datasheet, PDF (578/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Serial Communication Interface (S12SCIV5)
Table 18-12. SCISR2 Field Descriptions (continued)
Field
3
RXPOL
2
BRK13
1
TXDIR
0
RAF
Description
Receive Polarity — This bit control the polarity of the received data. In NRZ format, a one is represented by a
mark and a zero is represented by a space for normal polarity, and the opposite for inverted polarity. In IrDA
format, a zero is represented by short high pulse in the middle of a bit time remaining idle low for a one for normal
polarity, and a zero is represented by short low pulse in the middle of a bit time remaining idle high for a one for
inverted polarity.
0 Normal polarity
1 Inverted polarity
Break Transmit Character Length — This bit determines whether the transmit break character is 10 or 11 bit
respectively 13 or 14 bits long. The detection of a framing error is not affected by this bit.
0 Break character is 10 or 11 bit long
1 Break character is 13 or 14 bit long
Transmitter Pin Data Direction in Single-Wire Mode — This bit determines whether the TXD pin is going to
be used as an input or output, in the single-wire mode of operation. This bit is only relevant in the single-wire
mode of operation.
0 TXD pin to be used as an input in single-wire mode
1 TXD pin to be used as an output in single-wire mode
Receiver Active Flag — RAF is set when the receiver detects a logic 0 during the RT1 time period of the start
bit search. RAF is cleared when the receiver detects an idle character.
0 No reception in progress
1 Reception in progress
18.3.2.9 SCI Data Registers (SCIDRH, SCIDRL)
Module Base + 0x0006
7
6
5
4
3
2
1
0
R
R8
0
0
0
0
0
0
T8
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 18-12. SCI Data Registers (SCIDRH)
Module Base + 0x0007
7
6
5
4
3
2
1
0
R
R7
R6
R5
R4
R3
R2
R1
R0
W
T7
T6
T5
T4
T3
T2
T1
T0
Reset
0
0
0
0
0
0
0
0
Figure 18-13. SCI Data Registers (SCIDRL)
Read: Anytime; reading accesses SCI receive data register
Write: Anytime; writing accesses SCI transmit data register; writing to R8 has no effect
MC9S12G Family Reference Manual, Rev.1.01
578
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.