MC9S12G Datasheet, PDF (637/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Timer Module (TIM16B8CV3)
Register
Name
0x000E
TFLG1¹
0x000F
TFLG2
0x0010–0x001F
TCxH–TCxL³
P0AxC00T2L0²
P0AxF00L2G1²
PA0xC0N0T2H2 ²
P0AxC0N0T2L3²
0x0024–0x002B
Reserved
0x002C
OCPD¹
0x002D
Reserved
Bit 7
6
5
4
3
2
1
Bit 0
R
C7F
C6F
C5F
C4F
C3F
C2F
C1F
C0F
W
R
0
0
0
0
0
0
0
TOF
W
R
Bit 15
W
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
R
Bit 7
W
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
0
W
PAEN PAMOD PEDGE CLK1
CLK0
PAOVI
PAI
R
0
0
0
0
0
0
PAOVF
PAIF
W
R
PACNT15 PACNT14 PACNT13 PACNT12 PACNT11 PACNT10 PACNT9 PACNT8
W
R
PACNT7 PACNT6 PACNT5 PACNT4 PACNT3 PACNT2 PACNT1 PACNT0
W
R
W
R
OCPD7
W
OCPD6
OCPD5
OCPD4
OCPD3
OCPD2
OCPD1
OCPD0
R
0x002E
PTPSR
R
PTPS7
W
PTPS6
PTPS5
PTPS4
PTPS3
PTPS2
0x002F
R
Reserved
W
= Unimplemented or Reserved
Figure 20-5. TIM16B8CV3 Register Summary (Sheet 2 of 2)
1 _{The related bit is available only if corresponding channel exists}
2 _{The register is available only if channel 7 exists.}
3 _{The register is available only if corresponding channel exists.}
PTPS1
PTPS0
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
637
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.