MC9S12G Datasheet, PDF (67/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Device Overview MC9S12G-Family
Table 1-14. 32-Pin LQFP Pinout for S12G48 and S12G64
Package Pin
Function
<----lowest-----PRIORITY-----highest---->
Pin
2nd
Func.
3rd
Func.
4th
Func
5th
Func
Power
Supply
Internal Pull
Resistor
CTRL
Reset
State
5
VSS
—
—
—
—
—
—
—
6
PE1¹
XTAL
—
—
—
—
PUCR/PDPEE
Down
7
TEST
—
—
—
—
N.A.
RESET pin
Down
8
BKGD
MODC
—
—
—
V_DDX
PUCR/BKPUE
Up
9
PP0
KWP0
ETRIG0 API_EXTCLK PWM0 V_DDX
PERP/PPSP
Disabled
10
PP1
KWP1
ETRIG1 ECLKX2 PWM1 V_DDX
PERP/PPSP
Disabled
11
PP2
KWP2
ETRIG2 PWM2
—
V_DDX
PERP/PPSP
Disabled
12
PP3
KWP3
ETRIG3 PWM3
—
V_DDX
PERP/PPSP
Disabled
13
PT3
IOC3
—
—
—
V_DDX
PERT/PPST
Disabled
14
PT2
IOC2
—
—
—
V_DDX
PERT/PPST
Disabled
15
PT1
IOC1
IRQ
—
—
V_DDX
PERT/PPST
Disabled
16
PT0
IOC0
XIRQ
—
—
V_DDX
PERT/PPST
Disabled
17
PAD0
KWAD0
AN0
—
—
V_DDA PER1AD/PPS1AD Disabled
18
PAD1
KWAD1
AN1
—
—
V_DDA PER1AD/PPS1AD Disabled
19
PAD2
KWAD2
AN2
—
—
V_DDA PER1AD/PPS1AD Disabled
20
PAD3
KWAD3
AN3
—
—
V_DDA PER1AD/PPS1AD Disabled
21
PAD4
KWAD4
AN4
—
—
V_DDA PER1AD/PPS1AD Disabled
22
PAD5
KWAD5
AN5
ACMPO
—
V_DDA PER1AD/PPS1AD Disabled
23
PAD6
KWAD6
AN6
ACMPP
—
V_DDA PER1AD/PPS1AD Disabled
24
PAD7
KWAD7
AN7
ACMPM
—
V_DDA PER1AD/PPS1AD Disabled
25
PS0
RXD0
—
—
—
V_DDX
PERS/PPSS
Up
26
PS1
TXD0
—
—
—
V_DDX
PERS/PPSS
Up
27
PS4
PWM4
MISO0
—
—
V_DDX
PERS/PPSS
Up
28
PS5
IOC4
MOSI0
—
—
V_DDX
PERS/PPSS
Up
29
PS6
IOC5
SCK0
—
—
V_DDX
PERS/PPSS
Up
30
PS7 API_EXTCLK ECLK
PWM5
SS0
V_DDX
PERS/PPSS
Up
31
PM0
RXD1
RXCAN
—
—
V_DDX
PERM/PPSM Disabled
32
PM1
TXD1
TXCAN
—
—
V_DDX
PERM/PPSM Disabled
1 _{The regular I/O characteristics (see Section A.2, “I/O Characteristics”) apply if the EXTAL/XTAL function is disabled}
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
67
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.