MC9S12G Datasheet, PDF (149/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

2.4.2.1 Block Register Map (G1)
Port Integration Module (S12GPIMV0)
Global Address
Register Name
0x0000
PORTA
0x0001
PORTB
0x0002
DDRA
0x0003
DDRB
0x0004
PORTC
0x0005
PORTD
0x0006
DDRC
0x0007
DDRD
0x0008
PORTE
0x0009
DDRE
0x000A–0x000B
Non-PIM
Address Range
0x000C
PUCR
0x000D
Reserved
0x000E–0x001B
Non-PIM
Address Range
Table 2-19. Block Register Map (G1)
Bit 7
R
PA7
W
R
PB7
W
R
DDRA7
W
R
DDRB7
W
R
PC7
W
R
PD7
W
R
DDRC7
W
R _DDRD7
6
PA6
PB6
DDRA6
DDRB6
PC6
PD6
DDRC6
DDRD6
5
PA5
PB5
DDRA5
DDRB5
PC5
PD5
DDRC5
DDRD5
4
PA4
PB4
DDRA4
DDRB4
PC4
PD4
DDRC4
DDRD4
3
PA3
PB3
DDRA3
DDRB3
PC3
PD3
DDRC3
DDRD3
2
PA2
PB2
DDRA2
DDRB2
PC2
PD2
DDRC2
DDRD2
R
0
0
0
0
0
0
W
R
0
0
0
0
0
0
W
R
W
Non-PIM Address Range
R
0
W
R
0
W
R
W
BKPUE
0
0
PDPEE PUPDE PUPCE
0
0
0
0
Non-PIM Address Range
= Unimplemented or Reserved
1
PA1
PB1
DDRA1
DDRB1
PC1
PD1
DDRC1
DDRD1
PE1
DDRE1
PUPBE
0
Bit 0
PA0
PB0
DDRA0
DDRB0
PC0
PD0
DDRC0
DDRD0
PE0
DDRE0
PUPAE
0
MC9S12G Family Reference Manual, Rev.1.01
Freescale Semiconductor
149
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.