MC9S12G Datasheet, PDF (636/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Timer Module (TIM16B8CV3)
20.3.2 Register Descriptions
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
Only bits related to implemented channels are valid.
Register
Name
Bit 7
6
5
4
3
2
1
Bit 0
0x0000
TIOS¹
R
IOS7
W
IOS6
IOS5
IOS4
IOS3
IOS2
IOS1
IOS0
0x0001
CFORC¹
0x0002
OC7M²
O0xC070D03²
0x0004
TCNTH
0x0005
TCNTL
0x0006
TSCR1
0x0007
TTOV¹
0x0008
TCTL1¹
0x0009
TCTL2¹
0x000A
TCTL3¹
0x000B
TCTL4¹
0x000C
TIE¹
0x000D
TSCR2¹
R
0
W FOC7
0
FOC6
0
FOC5
0
FOC4
0
FOC3
0
FOC2
R
OC7M7
W
OC7M6
OC7M5
OC7M4
OC7M3
OC7M2
R
OC7D7
W
OC7D6
OC7D5
OC7D4
OC7D3
OC7D2
R
TCNT15 TCNT14 TCNT13 TCNT12 TCNT11 TCNT10
W
R
TCNT7
W
TCNT6
TCNT5
TCNT4
TCNT3
TCNT2
R
0
TEN
TSWAI TSFRZ TFFCA PRNT
W
R
TOV7
W
TOV6
TOV5
TOV4
TOV3
TOV2
R
OM7
OL7
OM6
OL6
OM5
OL5
W
R
OM3
OL3
OM2
OL2
OM1
OL1
W
R
EDG7B
W
EDG7A
EDG6B
EDG6A
EDG5B
EDG5A
R
EDG3B
W
EDG3A
EDG2B
EDG2A
EDG1B
EDG1A
R
C7I
C6I
C5I
C4I
C3I
C2I
W
R
0
0
0
TOI
TCRE
PR2
W
0
FOC1
OC7M1
OC7D1
TCNT9
TCNT1
0
TOV1
OM4
OM0
EDG4B
EDG0B
C1I
PR1
0
FOC0
OC7M0
OC7D0
TCNT8
TCNT0
0
TOV0
OL4
OL0
EDG4A
EDG0A
C0I
PR0
= Unimplemented or Reserved
Figure 20-5. TIM16B8CV3 Register Summary (Sheet 1 of 2)
MC9S12G Family Reference Manual, Rev.1.01
636
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.