MC9S12G Datasheet, PDF (196/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Port Integration Module (S12GPIMV0)
Table 2-72. PERJ Register Field Descriptions
Field
7-0
PERJ
Description
Port J pull device enable—Enable pull device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
2.4.3.46 Port J Polarity Select Register (PPSJ)
Address 0x026D (G1, G2)
7
R
PPSJ7
W
Reset
0
Address 0x026D (G3)
6
PPSJ6
0
5
PPSJ5
0
4
PPSJ4
0
3
PPSJ3
0
2
PPSJ2
0
7
R
0
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
0
0
0
PPSJ3
PPSJ2
0
0
0
0
0
Figure 2-46. Port J Polarity Select Register (PPSJ)
Access: User read/write¹
1
0
PPSJ1
PPSJ0
0
0
Access: User read/write¹
1
0
PPSJ1
PPSJ0
0
0
Table 2-73. PPSJ Register Field Descriptions
Field
7-0
PPSJ
Description
Port J pull device select—Configure pull device and pin interrupt edge polarity on input pin
This bit selects a pullup or a pulldown device if enabled on the associated port input pin.
This bit also selects the polarity of the active pin interrupt edge.
1 Pulldown device selected; rising edge selected
0 Pullup device selected; falling edge selected
MC9S12G Family Reference Manual, Rev.1.01
196
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.