MC9S12G Datasheet, PDF (460/1160 Pages) Freescale Semiconductor, Inc – Ignores external trigger. Performs one conversion sequence and stops.

Analog-to-Digital Converter (ADC12B16CV2)
Table 14-15. Analog Input Channel Select Coding
SC
CD
CC
CB
CA
Analog Input
Channel
1
0
0
0
0
Internal_6,
Temperature sense of ADC
hardmacro
0
0
0
1
Internal_7
0
0
1
0
Internal_0
0
0
1
1
0
1
0
0
0
1
0
1
Internal_1
VRH
VRL
0
1
1
0
0
1
1
1
1
0
0
0
(VRH+VRL) / 2
Reserved
Internal_2
1
0
0
1
1
0
1
0
1
0
1
1
Internal_3
Internal_4
Internal_5
1
1
X
X
Reserved
14.3.2.7 ATD Status Register 0 (ATDSTAT0)
This register contains the Sequence Complete Flag, overrun flags for external trigger and FIFO mode, and
the conversion counter.
Module Base + 0x0006
R
W
Reset
7
SCF
0
6
5
4
3
2
1
0
0
CC3
CC2
CC1
CC0
ETORF
FIFOR
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 14-9. ATD Status Register 0 (ATDSTAT0)
Read: Anytime
Write: Anytime (No effect on (CC3, CC2, CC1, CC0))
MC9S12G Family Reference Manual, Rev.1.01
460
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.