EP1SGX10C Datasheet, PDF (99/262 Pages) Altera Corporation – StratixGX FPGA Family

TriMatrix Memory
Figure 66. M-RAM Column Unit Interface to Interconnect
C4 and C8 Interconnects
LAB
LAB
LAB
12
datain
12
dataout
M-RAM Block
M-RAM Block to
LAB Row Interface
Block Interconnect
Region
Column Interface
Block
Altera Corporation
99
Preliminary