EP1SGX10C Datasheet, PDF (78/262 Pages) Altera Corporation – StratixGX FPGA Family

Stratix GX FPGA Family
Table 22 shows the Stratix GX device’s routing scheme.
Table 22. Stratix GX Device Routing Scheme
Destination
Source
LUT Chain
v
Register Chain
v
Local
Interconnect
vvvvvvv
Direct Link
Interconnect
v
R4 Interconnect
v
v
vv
v
R8 Interconnect
v
v
v
R24
Interconnect
v
vv
v
C4 Interconnect
v
v
v
C8 Interconnect
v
v
v
C16
Interconnect
v
vv
v
LE
vvvvvv
vv
M512 RAM
Block
vvvv
vv
M4K RAM Block
vvvv
vv
M-RAM Block
vv
DSP Blocks
vvvv
vv
Column IOE
v
vvv
Row IOE
v
vvvvv
78
Preliminary
Altera Corporation