EP1SGX10C Datasheet, PDF (196/262 Pages) Altera Corporation – StratixGX FPGA Family

Stratix GX FPGA Family
Table 60. Stratix GX Device Absolute Maximum Ratings (Part 2 of 2) Notes (1), (2)
Symbol
Parameter
T_STG
T_AMB
T_J
Storage temperature
Ambient temperature
Junction temperature
Conditions
No bias
Under bias
BGA packages under bias
Minimum Maximum Unit
–65
150
°C
–65
135
°C
135
°C
Table 61. Stratix GX Device Recommended Operating Conditions Note (7), (12), (13)
Symbol
V_CCINT
V_CCIO
V_I
V_O
T_J
Parameter
Conditions
Minimum Maximum Unit
Supply voltage for internal logic (4)
and input buffers
Supply voltage for output buffers, (4), (5)
3.3-V operation
Supply voltage for output buffers, (4)
2.5-V operation
Supply voltage for output buffers, (4)
1.8-V operation
Supply voltage for output buffers, (4)
1.5-V operation
Input voltage
(3), (6)
1.425
1.575
V
3.00 (3.135) 3.60 (3.465) V
2.375
2.625
V
1.71
1.89
V
1.4
1.6
V
–0.5
4.1
V
Output voltage
0
Operating junction temperature For commercial
0
use
For industrial use
–40
V_CCIO
V
85
°C
100
°C
Table 62. Stratix GX Device DC Operating Conditions
Symbol
I_I
I_OZ
R_CONF
Parameter
Conditions
Input pin leakage
current
V_I = V_{C C I O m a x} to 0 V
(8)
Tri-stated I/O pin
leakage current
V_O = V_{C C I O m a x} to 0 V
(8)
Value of I/O pin pull- V_CCIO = 3.0 V (9)
up resistor before
and during
V_CCIO = 2.375 V (9)
configuration
V_CCIO = 1.71 V (9)
Note (12)
Minimum
–10
–10
20
30
60
Typical Maximum Unit
10
µA
10
µA
50
kΩ
80
kΩ
150
kΩ
196
Preliminary
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