EP1SGX10C Datasheet, PDF (108/262 Pages) Altera Corporation – StratixGX FPGA Family

Stratix GX FPGA Family
the capabilities for dynamic and mixed sign multiplications are handled
differently. The following list provides the largest functions that can fit
into a single DSP block.
■ 36 × 36-bit unsigned by unsigned multiplication
■ 36 × 36-bit signed by signed multiplication
■ 35 × 36-bit unsigned by signed multiplication
■ 36 × 35-bit signed by unsigned multiplication
■ 36 × 35-bit signed by dynamic sign multiplication
■ 35 × 36-bit dynamic sign by signed multiplication
■ 35 × 36-bit unsigned by dynamic sign multiplication
■ 36 × 35-bit dynamic sign by unsigned multiplication
■ 35 × 35-bit dynamic sign multiplication when the sign controls for
each operand are different
■ 36 × 36-bit dynamic sign multiplication when the same sign control
is used for both operands
1 This list only shows functions that can fit into a single DSP block.
Multiple DSP blocks can support larger multiplication
functions.
Figure 72 shows one of the columns with surrounding LAB rows.
108
Preliminary
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