EP1SGX10C Datasheet, PDF (207/262 Pages) Altera Corporation – StratixGX FPGA Family

Operating Conditions
Table 75. HyperTransport Specifications
Symbol
V_CCIO
V_OD
∆V_{O D}
V_OCM
∆V_{O C M}
V_ID
V_ICM
R_L
Parameter
Conditions
I/O supply voltage
Differential output voltage
Change in between high
and low
Output common mode
voltage
Change in between high
and low
Differential input voltage
swing (single-ended)
Input common mode
voltage
Receiver differential input
resistor, external
R_L = 100 Ω
R_L = 100 Ω
R_L = 100 Ω
R_L = 100 Ω
Minimum
2.375
380
Typical
2.5
485
Maximum
2.625
820
50
Units
V
mV
mV
440
650
780
mV
50
mV
300
900
mV
300
900
mV
90
100
110
W
Table 76. 3.3-V PCI Specifications
Symbol
V_CCIO
V_IH
Parameter
Output supply voltage
High-level input voltage
Conditions
V_IL
Low-level input voltage
V_OH
High-level output voltage I_OUT = –500 µA
V_OL
Low-level output voltage I_OUT = 1,500 µA
Minimum
3.0
0.5 ×
V_CCIO
–0.5
0.9 ×
V_CCIO
Typical
3.3
Maximum
3.6
V_CCIO +
0.5
0.3 ×
V_CCIO
0.1 ×
V_CCIO
Units
V
V
V
V
V
Table 77. PCI-X Specifications (Part 1 of 2)
Symbol
V_CCIO
V_IH
Parameter
Output supply voltage
High-level input voltage
Conditions
V_IL
Low-level input voltage
V_IPU
Input pull-up voltage
Minimum
3.0
0.5 ×
V_CCIO
–0.5
0.7 ×
V_CCIO
Typical
Maximum
3.6
V_CCIO +
0.5
0.35 ×
V_CCIO
Units
V
V
V
V
Altera Corporation
207
Preliminary