HD6417705 Datasheet, PDF (733/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Index
16-bit timer pulse unit ........................... 329
16-Bit/32-Bit Displacement ..................... 41
A/D conversion time ............................. 534
A/D converter ....................................... 527
Absolute Addresses ................................. 41
Access wait control ............................... 192
Address multiplexing ............................ 200
Address Space Identifier.......................... 71
Address Transition .................................. 71
Address-Array Read .............................. 104
Address-Array Write
(Associative Operation)......................... 104
Address-Array Write
(non-Associative Operation).................. 104
Advanced user debugger ....................... 583
Alarm function...................................... 371
Asynchronous Mode.............................. 402
Auto-Reload count operation ................. 319
Auto-Request mode............................... 254
Big endian....................................... 38, 180
Boundary scan mode ............................. 581
Buffer operation .................................... 346
Bulk-in transfer ..................................... 462
Bulk-out transfer ................................... 461
Burst mode............................................ 265
Burst read ............................................. 212
Burst ROM interface ............................. 231
Bus arbitration ...................................... 235
Bus clock (Bφ) ...................................... 271
Bus State Controller .............................. 149
Byte-selection SRAM interface ............. 233
Clock Pulse Generator........................... 271
Clock synchronous mode....................... 396
Compare match counter operation ......... 326
Compare match timer ............................ 323
Control Registers .................................... 29
Control transfer ..................................... 455
Crystal resonator ................................... 273
Cycle-Steal mode .................................. 264
Data stage ............................................. 457
Data-Array Read ................................... 105
Data-Array Write................................... 105
Delayed Branching.................................. 40
Direct memory access controller ............ 239
Dual Address mode ............................... 261
Emulator ............................................... 567
Exception handling................................ 109
Exception Handling State ........................ 25
External request mode ........................... 265
Fixed mode ........................................... 257
Free-running count ................................ 344
General Registers .................................... 29
Global Base Register (GBR) ................... 36
User debugging interface ....................... 567
I/O ports................................................ 507
Infrared data association (IrDA)............. 431
Input capture function............................ 320
Instruction Length ................................... 40
Internal clock (Iφ).................................. 271
Interrupt Controller................................ 125
Interrupt sources.................................... 136
Interrupt-in transfer ............................... 463
Interval timer mode ............................... 291
IrDA interface ....................................... 431
IRL Interrupts........................................ 137
IRQ Interrupts ....................................... 136
JTAG .................................................... 567
Literal Constant....................................... 41
Little endian .................................... 39, 180
Rev. 2.00, 09/03, page 687 of 690