HD6417705 Datasheet, PDF (344/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Bit
Bit Name Initial Value R/W Description
1, 0

0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
11.3.3 Standby Control Register 3 (STBCR3)
STBCR3 is an 8-bit readable/writable register that controls the operation of modules in the power-
down mode.
Bit
Bit Name Initial Value R/W Description
7
MSTP37 0
R/W Module Stop Bit 37
When the MSTP37 bit is set to 1, the clock supply to
the USB is halted.
0: USB runs
1: Clock supply to USB is halted
6

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
5
MSTP35 0
R/W Module Stop Bit 35
When the MSTP35 bit is set to 1, the clock supply to
the CMT is halted.
0: CMT runs
1: Clock supply to CMT is halted
4
MSTP34 0
R/W Module Stop Bit 34
When the MSTP34 bit is set to 1, the clock supply to
the TPU is halted.
0: TPU runs
1: Clock supply to TPU is halted
3
MSTP33 0
R/W Module Stop Bit 33
When the MSTP33 bit is set to 1, the clock supply to
the ADC is halted.
0: ADC runs
1: Clock supply to ADC is halted
Rev. 2.00, 09/03, page 298 of 690