HD6417705 Datasheet, PDF (23/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

8.3.3 DMA Transfer Count Registers (DMATCR).................................................... 243
8.3.4 DMA Channel Control Registers (CHCR)........................................................ 243
8.3.5 DMA Operation Register (DMAOR) ............................................................... 248
8.3.6 DMA Extended Resource Selectors 0, 1 (DMARS0, DMARS1)....................... 250
8.4 Operation..................................................................................................................... 252
8.4.1 Transfer Flow.................................................................................................. 252
8.4.2 DMA Transfer Requests .................................................................................. 254
8.4.3 Channel Priority .............................................................................................. 257
8.4.4 DMA Transfer Types....................................................................................... 260
8.4.5 Number of Bus Cycle States and DREQ Pin Sampling Timing ......................... 267
8.5 Precautions .................................................................................................................. 270
8.5.1 Precautions when Mixing Cycle-Steal Mode Channels and Burst Mode
Channels ......................................................................................................... 270
Section 9 Clock Pulse Generator (CPG)......................................................... 271
9.1 Features ....................................................................................................................... 271
9.2 Input/Output Pins......................................................................................................... 274
9.3 Clock Operating Modes................................................................................................ 275
9.4 Register Descriptions ................................................................................................... 279
9.4.1 Frequency Control Register (FRQCR).............................................................. 279
9.4.2 USB Clock Frequency Control Register (UCLKCR) ........................................ 281
9.4.3 Usage Notes .................................................................................................... 281
9.5 Changing Frequency .................................................................................................... 282
9.5.1 Changing Multiplication Rate .......................................................................... 282
9.5.2 Changing Division Ratio.................................................................................. 282
9.5.3 Modification of Clock Operating Mode............................................................ 282
9.6 Usage Notes................................................................................................................. 283
Section 10 Watchdog Timer (WDT) .............................................................. 285
10.1 Features ....................................................................................................................... 285
10.2 Register Descriptions ................................................................................................... 286
10.2.1 Watchdog Timer Counter (WTCNT)................................................................ 286
10.2.2 Watchdog Timer Control/Status Register (WTCSR)......................................... 287
10.2.3 Notes on Register Access................................................................................. 289
10.3 Operation..................................................................................................................... 290
10.3.1 Canceling Software Standbys........................................................................... 290
10.3.2 Changing Frequency........................................................................................ 291
10.3.3 Using Watchdog Timer Mode.......................................................................... 291
10.3.4 Using Interval Timer Mode.............................................................................. 291
Section 11 Power-Down Modes..................................................................... 293
11.1 Features ....................................................................................................................... 293
11.2 Input/Output Pins......................................................................................................... 295
Rev. 2.00, 09/03, page xxiii of xlvi