HD6417705 Datasheet, PDF (26/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

15.3.15 Year Alarm Register (RYRAR) ....................................................................... 364
15.3.16 RTC Control Register 1 (RCR1) ...................................................................... 365
15.3.17 RTC Control Register 2 (RCR2) ...................................................................... 366
15.3.18 RTC Control Register 3 (RCR3) ...................................................................... 368
15.4 Operation .................................................................................................................... 369
15.4.1 Initial Settings of Registers after Power-On ..................................................... 369
15.4.2 Setting Time.................................................................................................... 369
15.4.3 Reading the Time ............................................................................................ 370
15.4.4 Alarm Function ............................................................................................... 371
15.4.5 Crystal Oscillator Circuit ................................................................................. 372
15.5 Notes for Usage ........................................................................................................... 373
15.5.1 Register Writing during RTC Count ................................................................ 373
15.5.2 Use of Realtime Clock (RTC) Periodic Interrupts............................................. 373
15.5.3 Standby Mode after Register Setting................................................................ 373
Section 16 Serial Communication Interface with FIFO (SCIF) .......................375
16.1 Features....................................................................................................................... 375
16.2 Input/Output Pins......................................................................................................... 378
16.3 Register Descriptions................................................................................................... 379
16.3.1 Receive Shift Register (SCRSR) ...................................................................... 380
16.3.2 Receive FIFO Data Register (SCFRDR) .......................................................... 380
16.3.3 Transmit Shift Register (SCTSR)..................................................................... 380
16.3.4 Transmit FIFO Data Register (SCFTDR) ......................................................... 381
16.3.5 Serial Mode Register (SCSMR) ....................................................................... 381
16.3.6 Serial Control Register (SCSCR) ..................................................................... 385
16.3.7 FIFO Error Count Register (SCFER) ............................................................... 389
16.3.8 Serial Status Register (SCSSR)........................................................................ 390
16.3.9 Bit Rate Register (SCBRR).............................................................................. 395
16.3.10 FIFO Control Register (SCFCR)...................................................................... 398
16.3.11 FIFO Data Count Register (SCFDR)................................................................ 401
16.3.12 Transmit Data Stop Register (SCTDSR) .......................................................... 401
16.4 Operation .................................................................................................................... 402
16.4.1 Overview ........................................................................................................ 402
16.4.2 Asynchronous Mode........................................................................................ 402
16.4.3 Serial Operation in Asynchronous Mode.......................................................... 404
16.4.4 Clock Synchronous Mode................................................................................ 415
16.4.5 Serial Operation in Clock Synchronous Mode .................................................. 416
16.5 SCIF Interrupt Sources and DMAC.............................................................................. 426
16.6 Notes on Usage............................................................................................................ 428
Section 17 Infrared Data Association Module (IrDA) .....................................431
17.1 Features....................................................................................................................... 431
17.2 Input/Output Pins......................................................................................................... 432
Rev. 2.00, 09/03, page xxvi of xlvi