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HD6417705 Datasheet, PDF (331/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series
Section 10 Watchdog Timer (WDT)
This LSI includes the watchdog timer (WDT) and can be reset by the overflow of the counter
when the value of the counter has not been updated because of an erroneous system operation.
The WDT is a single-channel timer that uses a peripheral clock as an input and counts the clock
settling time when clearing software standby mode and temporary standbys, such as frequency
changes. It can also be used as a conventional watchdog timer or an interval timer.
10.1 Features
• Can be used to ensure the clock settling time
Use the WDT to clear software standby mode and the temporary standbys which occur when
the clock frequency is changed.
• Can switch between watchdog timer mode and interval timer mode.
• Generates internal resets in watchdog timer mode
Internal resets occur after counter overflow.
Power-on reset and manual reset are available.
• Interrupt generation in interval timer mode
An interval timer interrupt is generated when the counter overflows.
• Choice of eight counter input clocks
Eight clocks (×1 to ×1/4096) that are obtained by dividing the peripheral clock can be selected.
WDTS311A_000020020100
Rev. 2.00, 09/03, page 285 of 690