HD6417705 Datasheet, PDF (555/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

20.2.1 Register Description
Port B has the following register. For details on the register address and access size, see section
24, List of Registers.
• Port B data register (PBDR)
20.2.2 Port B Data Register (PBDR)
PBDR is an 8-bit readable/writable register that stores data for pins PTB7 to PTB0. Bits PB7DT to
PB0DT correspond to pins PTB7 to PTB0. When the pin function is general output port, if the port
is read the value of the corresponding PBDR bit is returned directly. When the function is general
input port, if the port is read, the corresponding pin level is read.
Bit
7 to 0
Bit
Name
PB7DT
to
PB0DT
Initial
Value R/W
0
R/W
Description
Table 20.2 shows the function of PBDR.
Table 20.2 Port B Data Register (PBDR) Read/Write Operations
PBCR State
PBnMD1 PBnMD0 Pin State
Read
Write
0
0
Other function PBDR value Data can be written to PBDR but no effect on
pin state.
1
Output
PBDR value Written data is output from the pin.
1
0
Input (Pull-up Pin state
Data can be written to PBDR but no effect on
MOS on)
pin state.
1
Input (Pull-up Pin state
Data can be written to PBDR but no effect on
MOS off)
pin state.
Note: n = 0 to 7
Rev. 2.00, 09/03, page 509 of 690