HD6417705 Datasheet, PDF (230/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Table 7.7 32-Bit External Device/Little Endian Access and Data Alignment
D31 to
Operation D24
Byte access 
at 0
Data Bus
D23 to D15 to
D16
D8


WE3 D7 to D0 ,
DQMUU
Data 7 to 
Data 0
Strobe Signals
WE2, WE1,
DQMUL DQMLU


WE0,
DQMLL
Assert
Byte access 

Data 7 to 

at 1
Data 0
Byte access 
at 2
Data 7 to 


Data 0
Byte access Data 7 to 
at 3
Data 0


Assert
Word access 

Data 15 Data 7 to 
at 0
to Data 8 Data 0
Word access Data 15 to Data 7 to 

Assert
at 2
Data 8 Data 0
Longword Data 31 to Data 23 to Data 15 Data 7 to Assert
access at 0 Data 24 Data 16 to Data 8 Data 0

Assert


Assert
Assert
Assert


Assert

Assert



Assert

Assert
Rev. 2.00, 09/03, page 184 of 690