HD6417705 Datasheet, PDF (186/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Table 6.4 Interrupt Exception Handling Sources and Priority (IRQ Mode)
Interrupt Source
NMI
UDI
IRQ
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
PINT
PINT0 to
PINT7
PINT8 to
PINT15
DMAC DEI0
DEI1
DEI2
DEI3
SCIF0 ERI0
RXI0
TXI0
SCIF2 ERI2
RXI2
TXI2
ADC ADI
USB USI0
USI1
TPU0 TPI0
TPU1 TPI1
TPU2 TPI2
TPU3 TPI3
Interrupt
Priority
Priority
IPR
within IPR Default
Interrupt Code^*1 (Initial Value) (Bit Numbers) Setting Unit Priority
H'1C0^*2
16


High
H'5E0^*2
15


H'600^*3
0 to 15 (0) IPRC (3 to 0) 
H'620^*3
0 to 15 (0) IPRC (7 to 4) 
H'640^*3
0 to 15 (0) IPRC (11 to 8) 
H'660^*3
0 to 15 (0) IPRC (15 to 12) 
H'680^*3
0 to 15 (0) IPRD (3 to 0) 
H'6A0^*3
0 to 15 (0) IPRD (7 to 4) 
H'700^*3
0 to 15 (0) IPRD (15 to 12) 
H'720^*3
0 to 15 (0) IPRD (11 to 8) 
H'800^*3
H'820^*3
H'840^*3
H'860^*3
H'880^*3
H'8A0^*3
H'8E0^*3
H'900^*3
H'920^*3
H'960^*3
H'980^*3
H'A20^*3
H'A40^*3
H'C00^*3
H'C20^*3
H'C80^*3
H'CA0^*3
0 to 15 (0) IPRE (15 to 12) High
0 to 15 (0)
Low
IPRE (11 to 8) High
0 to 15 (0)
Low
IPRE (7 to 4) High
Low
0 to 15 (0) IPRE (3 to 0) —
0 to 15 (0) IPRF (7 to 4) High
Low
0 to 15 (0) IPRG (15 to 12) —
0 to 15 (0) IPRG (11 to 8) —
0 to 15 (0) IPRH (15 to 12) —
0 to 15 (0) IPRH (11 to 8) —
Low
Rev. 2.00, 09/03, page 140 of 690