HD6417705 Datasheet, PDF (467/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

b. Serial Data Transmission:
Figure 16.14 shows sample flowcharts for serial transmission.
Start of transmission
Write remaining transmit data to SCFTDR _[1]
Set TE bit in SCSCR
When using transmit FIFO data interrupt, [2]
set TIE bit to 1
[1] Write the remaining transmit
data to SCFTDR.
[2] Transmission is started when
the TE bit in SCSCR is set to 1.
[3] After the end of transmission,
clear the TE bit to 0.
TEND =1?
No
Yes
Clear TE bit in SCSCR to 0
[3]
End of transmission
Figure 16.14 Sample Serial Transmission Flowchart (1)
(First Transmission after Initialization)
Start of transmission
Set transmit trigger number in TTRG1
and TTRG0 in SCFCR
[1]
Write transmit data exceeding transmit
trigger setting number, and clear _[2]
TDFE flag to 0 after reading 1 from it
Wait
[3]
1-bit interval elapsed?
No
Yes
Set TE bit in SCSCR
When using transmit FIFO data [4]
interrupt, set TIE bit to 1
[1] Set the transmit trigger number
in SCFCR.
[2] Write transmit data to SCFTDR,
and clear the TDFE flag to 0 after
reading 1 from it.
[3] Wait for one bit interval.
[4] Transmission is started when the
TE bit in SCSCR is set to 1.
[5] After the end of transmission, clear
the TE bit to 0.
TEND =1?
No
Yes
Clear TE bit in SCSCR to 0
[5]
End of transmission
Figure 16.14 Sample Serial Transmission Flowchart (2)
(Second and Subsequent Transmission)
Rev. 2.00, 09/03, page 421 of 690