HD6417705 Datasheet, PDF (178/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

6.3.4 Interrupt Control Register 2 (ICR2)
ICR2 is a 16-bit register that specifies the detection mode for external interrupt input pins PINT15
to PINT0.
Bit
Bit Name Initial Value R/W
15 to 0 PINT15S to 0
R/W
PINT0S
Description
PINT15 to PINT0 Sense Select
Select whether interrupt request signals to
PINT15 to PINT0 are detected at low levels or
high levels.
PINTnS
0: Interrupt requests are detected at low level
input to the PINT pins
1: Interrupt requests are detected at high level
input to the PINT pins
[Legend] n = 0 to 15
6.3.5 PINT Interrupt Enable Register (PINTER)
PINTER is a 16-bit register that enables interrupt requests input to external interrupt input pins
PINT0 to PINT15.
When all or some of these pins, PINT0 to PINT15 are not used as an interrupt input, a bit
corresponding to a pin unused as an interrupt request should be cleared to 0.
Bit
Bit Name Initial Value R/W
15 to 0 PINT15E to 0
R/W
PINT0E
Description
PINT15 to PINT0 Interrupt Enable
Select whether the interrupt requests input to the
PINT15 to PINT0 pins is enabled.
PINTnE
0: Disables PINT input interrupt requests
1: Enables PINT input interrupt requests
[Legend] n = 0 to 15
Rev. 2.00, 09/03, page 132 of 690