HD6417705 Datasheet, PDF (559/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

20.5 Port E
Port E is an 8-bit input/output port with the pin configuration shown in figure 20.5. Each pin has
an input pull-up MOS, which is controlled by the port E control register (PECR) in the PFC.
Port E
PTE7 (input/output)
PTE6 (input/output)/TCLK (input)
PTE5 (input/output)/STATUS1 (output)/CTS0 (input)
PTE4 (input/output)/STATUS0 (output)/RTS0 (output)
PTE3 (input/output)/TEND0 (output)
PTE2 (input/output)/IRQ5 (input)
PTE1 (input/output)/DACK1 (output)
PTE0 (input/output)/DACK0 (output)
Figure 20.5 Port E
20.5.1 Register Description
Port E has the following register. For details on the register address and access size, see section
24, List of Registers.
• Port E data register (PEDR)
20.5.2 Port E Data Register (PEDR)
PEDR is an 8-bit readable/writable register that stores data for pins PTE7 to PTE0. Bits PE7DT to
PE0DT correspond to pins PTE7 to PTE0. When the pin function is general output port, if the port
is read, the value of the corresponding PEDR bit is returned directly. When the function is general
input port, if the port is read the corresponding pin level is read.
Bit
Initial
Bit Name Value R/W
7 to 0 PE7DT 0
R/W
to
PE0DT
Description
Table 20.5 shows the function of PEDR.
Rev. 2.00, 09/03, page 513 of 690