HD6417705 Datasheet, PDF (370/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

13.2 Register Descriptions
The CMT has the following registers. Refer to section 24, List of Registers, for more detail of the
addresses and access size.
• Compare match timer start register (CMSTR)
• Compare match timer control/status register (CMCSR)
• Compare match counter (CMCNT)
• Compare match constant register (CMCOR)
13.2.1 Compare Match Timer Start Register (CMSTR)
CMSTR is a 16-bit register that selects whether to operate or halt the counter (CMCNT).
Bit
Bit Name
15 to 1 —
Initial Value R/W
0
R
0
STR
0
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Count Start
Selects whether to operate or halt the compare
match counter.
0: CMCNT count operation halted
1: CMCNT count operation
Rev. 2.00, 09/03, page 324 of 690