HD6417705 Datasheet, PDF (425/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

16.3 Register Descriptions
The SCIF has the following internal registers. For details on register addresses and register states
in each processing state, refer to section 24, List of Registers.
1. Channel 0
• Serial mode register 0 (SCSMR_0)
• Bit rate register 0 (SCBRR_0)
• Serial control register 0 (SCSCR_0)
• Transmit data stop register 0 (SCTDSR_0)
• FIFO error count register 0 (SCFER_0)
• Serial status register 0 (SCSSR_0)
• FIFO control register 0 (SCFCR_0)
• FIFO data count register 0 (SCFDR_0)
• Transmit FIFO data register 0 (SCFTDR_0)
• Receive FIFO data register 0 (SCFRDR_0)
2. Channel 2
• Serial mode register 2 (SCSMR_2)
• Bit rate register 2 (SCBRR_2)
• Serial control register 2 (SCSCR_2)
• Transmit data stop register 2 (SCTDSR_2)
• FIFO error count register 2 (SCFER_2)
• Serial status register 2 (SCSSR_2)
• FIFO control register 2 (SCFCR_2)
• FIFO data count register 2 (SCFDR_2)
• Transmit FIFO data register 2 (SCFTDR_2)
• Receive FIFO data register 2 (SCFRDR_2)
Rev. 2.00, 09/03, page 379 of 690