HD6417705 Datasheet, PDF (491/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

18.3.7 EP0i Data Register (EPDR0i)
EPDR0i is an 8-byte transmit FIFO buffer for endpoint 0. EPDR0i holds one packet of transmit
data for control-in. Transmit data is fixed by writing one packet of data and setting EP0iPKTE in
the trigger register. When an ACK handshake is returned from the host after the data has been
transmitted, EP0iTS in interrupt flag register 0 is set. This FIFO buffer can be initialized by means
of EP0iCLR in the FCLR register.
Bit
7 to 0
Bit Name
D7 to D0
Initial Value R/W
Undefined
W
Description
Data register for control-in transfer
18.3.8 EP0o Data Register (EPDR0o)
EPDR0o is an 8-byte receive FIFO buffer for endpoint 0. EPDR0o holds endpoint 0 receive data
other than setup commands. When data is received successfully, EP0oTS in interrupt flag register
0 is set, and the number of receive bytes is indicated in the EP0o receive data size register. After
the data has been read, setting EP0oRDFN in the trigger register enables the next packet to be
received. This FIFO buffer can be initialized by means of BP0oCLR in the FCLR register.
Bit
7 to 0
Bit Name
D7 to D0
Initial Value R/W
Undefined
R
Description
Data register for control-out transfer
18.3.9 EP0s Data Register (EPDR0s)
EPDR0s is an 8-byte FIFO buffer specifically for receiving endpoint 0 setup commands. Only the
setup command to be processed by the application is received. When command data is received
successfully, the SETUPTS bit in interrupt flag register 0 is set.
As a latest setup command must be received in high priority, if data is left in this buffer, it will be
overwritten with new data. If reception of the next command is started while the current command
is being read, command reception has priority, the read by the application is forcibly stopped, and
the read data is invalid.
Bit
7 to 0
Bit Name
D7 to D0
Initial Value R/W
Undefined
R
Description
Data register for storing the setup command at
the control-out transfer
Rev. 2.00, 09/03, page 445 of 690