HD6417705 Datasheet, PDF (568/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

20.12.1 Register Description
Port M has the following register. For details on the register address and access size, see section
24, List of Registers.
• Port M data register (PMDR)
20.12.2 Port M Data Register (PMDR)
PMDR is an 8-bit readable/writable register that stores data for pins PTM6 and PTM4 to PTM0.
Bits PM6DT and PM4DT to PM0DT correspond to pins PTM6 and PTM4 to PTM0. When the pin
function is general output port, if the port is read, the value of the corresponding PMDR bit is
returned directly. When the function is general input port, if the port is read, the corresponding pin
level is read.
Bit
Bit Name
7
—
6
PM6DT
5
—
4 to 0 PM4DT
to
PM0DT
Initial
Value R/W
0
R
0
R/W
0
R
0
R/W
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
Table 20.12 shows the function of PMDR.
Reserved
This bit is always read as 0. The write value should
always be 0.
Table 20.12 shows the function of PMDR.
Table 20.12 Port M Data Register (PMDR) Read/Write Operations
PMCR State
PMnMD1 PMnMD0 Pin State
Read
Write
0
0
Other function PMDR value Data can be written to PMDR but no effect
on pin state.
1
Output
PMDR value Written data is output from the pin.
1
0
Input (Pull-up Pin state
Data can be written to PMDR but no effect
MOS on)
on pin state.
1
Input (Pull-up Pin state
Data can be written to PMDR but no effect
MOS off)
on pin state.
Note: n = 0 to 3 and 6
Rev. 2.00, 09/03, page 522 of 690