HD6417705 Datasheet, PDF (301/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Table 8.4 Selecting External Request Detection with DL, DS Bits
CHCR_0 or CHCR_1
DL
DS
0
0
1
1
0
1
Detection of External Request
Low level detection
Falling edge detection
High level detection
Rising edge detection
When DREQ is accepted, the DREQ pin becomes request accept disabled state. After issuing
acknowledge signal DACK for the accepted DREQ, the DREQ pin again becomes request accept
enabled state.
When DREQ is used for level detection, there are the following two cases depending on the timing
to detect the next DREQ after outputting DACK. A case wherein transfer is aborted after the same
number of transfers has been performed as requests (overrun 0) and wherein another transfer is
aborted after transfers have been performed for (the number of requests plus 1) times (overrun 1).
The DO bit in CHCR selects overrun 0 or overrun 1.
Table 8.5 Selecting External Request Detection with DO Bit
CHCR_0 or CHCR_1
DO
0
1
External Request
Overrun 0
Overrun 1
Rev. 2.00, 09/03, page 255 of 690