HD6417705 Datasheet, PDF (561/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Bit
Bit Name
7 to PF7DT
0 to
PF0DT
Initial
Value R/W
0
R/W
Description
Table 20.6 shows the function of PFDR.
Table 20.6 Port F Data Register (PFDR) Read/Write Operations
PFCR State
PFnMD1 PFnMD0 Pin State
Read
0
0
Other function PFDR value
1
1
0
1
Note: n = 0 to 7
Output
Input (Pull-up
MOS on)
Input (Pull-up
MOS off)
PFDR value
Pin state
Pin state
Write
Data can be written to PFDR but no effect on
pin state.
Written data is output from the pin.
Data can be written to PFDR but no effect on
pin state.
Data can be written to PFDR but no effect on
pin state.
20.7 Port G
Port G is an 8-bit input port with the pin configuration shown in figure 20.7. Each pin has an input
pull-up MOS, which is controlled by the port G control register (PGCR) in the PFC.
Port G
PTG7 (input/output)/WAIT (input)
PTG6 (input/output)/BREQ (input)
PTG5 (input/output)/BACK (output)
PTG4 (input/output)/AUDCK (output)
PTG3 (input/output)/TRST (input)
PTG2 (input/output)/TMS (input)
PTG1 (input/output)/TCK (input)
PTG0 (input/output)/TDI (input)
Figure 20.7 Port G
20.7.1 Register Description
Port G has the following register. For details on the register address and access size, see section
24, List of Registers.
• Port G data register (PGDR)
Rev. 2.00, 09/03, page 515 of 690