HD6417705 Datasheet, PDF (557/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Table 20.3 Port C Data Register (PCDR) Read/Write Operations
PCCR State
PCnMD1 PCnMD0 Pin State
Read
Write
0
0
Other function PCDR value Data can be written to PCDR but no effect on
pin state.
1
Output
PCDR value Written data is output from the pin.
1
0
Input (Pull-up Pin state
Data can be written to PCDR but no effect on
MOS on)
pin state.
1
Input (Pull-up Pin state
Data can be written to PCDR but no effect on
MOS off)
pin state.
Note: n = 0 to 7
20.4 Port D
Port D is an 8-bit input/output port with the pin configuration shown in figure 20.4. Each pin has
an input pull-up MOS, which is controlled by the port D control register (PDCR) in the PFC.
Port D
PTD7 (input/output)/CS6B (output)
PTD6 (input/output)/CS5B (output)
PTD5 (input)
/NF (input)
PTD4 (input/output)/CKE (output)
PTD3 (input/output)/CASU (output)
PTD2 (input/output)/CASL (output)
PTD1 (input/output)/RASU (output)
PTD0 (input/output)/RASL (output)
Figure 20.4 Port D
20.4.1 Register Description
Port D has the following register. For details on the register address and access size, see section
24, List of Registers.
• Port D data register (PDDR)
20.4.2 Port D Data Register (PDDR)
PDDR is an 8-bit readable/writable register that stores data for pins PTD7 to PTD0. Bits PD7DT
to PD0DT correspond to pins PTD7 to PTD0. When the pin function is general output port, if the
port is read, the value of the corresponding PDDR bit is returned directly. When the function is
general input port, if the port is read, the corresponding pin level is read.
Rev. 2.00, 09/03, page 511 of 690