HD6417705 Datasheet, PDF (479/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Bit
Bit Name
15 to 8 
Initial Value R/W
0
R
7
IRMOD
0
R/W
6 to 3 ICK3 to ICK0 0
R/W
2
PSEL
0
R/W
1, 0

0
R
Description
Reserved
These bits are always read as 0. The write
value should always be 0.
IrDA Mode
Selects whether this module operates as an
IrDA serial communication interface or as an
SCIF.
0: Operates as an SCIF
1: Operates as an IrDA
Output Pulse Division Ratio
Specifies the ratio for dividing the peripheral
clock (Pφ) to generate the IRCLK clock pulse
to be used for IrDA. IRCLK is obtained as
follows:
IRCLK = 1/(2N + 2) × Pφ
N = Value set by ICK3 to ICK0
Output Pulse Width Select
PSEL selects an IrDA output pulse width that
is 3/16 of the bit length for 115 kbps or 3/16 of
the bit length for the selected baud rate.
0: Pulse width is 3/16 of the bit length
1: Pulse width is 3/16 of 115 kbps bit length for
the baud rate selected by ICK3 to ICK0
Reserved
These bits are always read as 0. The write
value should always be 0.
Example:
Pφ clock: 14.7456 MHz
IRCLK: 921.6 kHz (fixed)
N: Setting of ICK3 to ICK0 (0 ≤ N ≤ 15)
N≥
Pφ
–1≥7
2×IRCLK
Accordingly, N is 7.
Rev. 2.00, 09/03, page 433 of 690