HD6417705 Datasheet, PDF (358/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

12.3.1 Timer Start Register (TSTR)
TSTR is an 8-bit readable/writable register that selects whether to run or halt the timer counters
(TCNT).
TSTR is initialized by satisfying the initialization conditions shown in section 24, List of
Registers, changing the multiplication ratio of PLL1, or setting the MSTP2 bit in STBCR to 1.
Bit Bit Name Initial Value
7 to 3 
0
2 STR2
0
1 STR1
0
0 STR0
0
R/W
R
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Counter Start 2
Selects whether to run or halt timer counter 2
(TCNT_2).
0: TCNT_2 count halted
1: TCNT_2 counts
Counter Start 1
Selects whether to run or halt timer counter 1
(TCNT_1).
0: TCNT_1 count halted
1: TCNT_1 counts
Counter Start 0
Selects whether to run or halt timer counter 0
(TCNT_0).
0: TCNT_0 count halted
1: TCNT_0 counts
Rev. 2.00, 09/03, page 312 of 690